Surface mounted electronic components beginning with ICs, and including transistors, diodes, capacitors, and piezoelectric resistors are supplied by being packed in packages consisting of a tray that has embossed pockets capable of storage conforming to the shape of the electronic components, or of carrier tape that continuously forms such pockets and cover tape that can be heat sealed to the carrier tape. Carrier tape that packages electronic components is ordinarily wound in a reel made of paper or plastic, and is maintained in that state prior to the mounting process. During the mounting process, the stored electronic components are automatically extracted from the tray, or from the carrier tape after peeling of the cover tape, and surface mounted onto an electronic circuit board.
In conjunction with overall advances in downsizing and enhanced performance of electronic components in recent years, electrostatic-sensitive components have increased, and process troubles caused by static electricity have arisen. Particularly with respect to electronic components in the semiconductor field, it has become difficult to maintain conventional electrostatic breakdown properties in conjunction with increasing integration, miniaturization, and ever lower operating voltage. Consequently, in the production process of semiconductor component manufacturers and in the assembly process of semiconductor component users, component breakdown due to electrostatic discharge (hereinafter “ESD”) has become problematic.
Outside of the semiconductor component field, breakdown of electronic components due to ESD is rare, but downsizing and weight reduction of mounted electronic components has rapidly advanced in conjunction with the downsizing and enhanced performance of electronic components in recent years. Static charging between cover tape and components due to friction during transport, and generation of static electricity during peeling of cover tape have resulted in problems of adhesion of electronic components to charged cover tape, and occurrence of process troubles such as pick-up defects. Consequently, there is a serious need for electronic component packaging that enables prevention of static electricity problems.
With respect to these problems of static electricity, Patent Document 1 adopts a technique achieving prevention of electrostatic induction from charged external objects that is based on incorporation of a low-molecular surfactant or the like into an intermediate layer, but with this method, bleeding and the like of the surfactant from the intermediate layer due to the storage environment of the film affects the physical properties of the film itself, causing deterioration in shield properties. Patent Document 2 recites that a π-conjugated conductive polymer layer is provided on the top face and bottom face of a cover-tape base layer, but when the pertinent conductive polymer layer is laminated onto the top face of the cover tape, the conductive layer peels off due to the heat of the heat iron depending on sealing conditions during sealing of the cover tape, and when it is laminated onto the bottom face, sealing properties are affected. Patent Document 3 recites that an inorganic material such as tin oxide, zinc oxide, titanium oxide, and carbon is dispersed between layers to bring out conductive properties, but when inorganic material is added, the inorganic material impairs transparency, hindering visual inspection after sealing of the cover tape.